Darius Grigaitis

There is a web page http://www.alterawiki.com/ where you can find nice description about running Linux or uClinux on NIOS processor but for me-not experienced Linux user it was paint-full to run Linux fast as I want. So, I will try to show my steps in two branches successful and not successful.

At the beginning I was confused about differences between uClinux and Linux for NIOS as you see later they seems to be using the same uClinux-dist directory to make image. For experiment I used Terasic DE0 development board it has 8-Mbyte SDRAM quite enough. Operating system is CentOs-6  and gcc version 4.4.4 20100726 (Red Hat 4.4.4-13) (GCC) (try command in terminal: gcc -v) and Quartus 11 (without SP1).

At first place you may need to install Quartus (I used Subscription Edition) and NIOS II Embedded Design Suite (this one I used for test purposes). Personally I am using Virtual Box installed in to Windows XP, thus you may nod need to install Quartus on Linux, but I suppose it is worth to forget Windows and stay in Linux.

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In Opencores web page is available FT2232 USB core designed to use with NIOS processor. Using similar principle but faster clocking to FT2232 I wrote own code.   I am using development board designed by myself with EP3C25Q240C8 Cyclone III FPGA with attached external memory of 1 MB (IS61LPS25636A) also with  FT2232H chip (1 Fig.).

Fig.1 Development board based on Cyclone III with external SRAM module and FT2232 chip

At the moment USB core uses ~500 logical cells with two 512 Bytes receive and transmit FIFO buffers (buffer size is editable, preferred to use 4095 Bytes). FT2232H is used in synchronous mode, that lets to achieve >25 MBytes data transfer speeds. Experiment showed that using NIOS at 100 MHz data transfer speed normally can be 16.4 Mbytes/s. Using dummy data transfer mode without checking of FIFO buffer status  33 MBytes/s speed was achieved (from NIOS to PC). Receive data transfer speed ~2 Mbytes/s using 200KB data buffer (there need to find out problems with FTDI driver usage).

Using NIOS at 128 MHz  data transfer speed reaches 41.8 MBytes/s (without reading of transmit FIFO status).

Current Features

Programmable interrupts of Receive FIFO status.
Programmable receive event char interrupt.
Asynchronous reset of Receive or Transmit FIFO.
FIFOs bufer sizes: 4, 8, 16, 32, 64, 128, 256, 512, 1024, 2048, 4096, 8192, 16384, 32768, 65536,131072  Bytes.

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This is a serial port (RS232) monitor-terminal for Windows CE and Windows Mobile 6.1 (6.5).

At the moment Terminal is compiled on Windows Mobile 6.5 professional, but also works with older versions. Moreover there is a compilation for all Windows PC applications.

Downloads

Terminal v1.00 (WM) (9.8 Mb)   Terminal v1.00 (WM) (5.3 Mb compressed with upx)

In version v1.00 you will find working terminal. It has several receive modes: ASCII, HEX, DEC and BIN (transmit mode in these formats will be available in future versions). Also separator (empty space) is included. There is possibility to add or remove 0x.. and b.. symbols to received HEX and BIN numbers. At the moment tehre is no support for Windows CE.

Terminal v1.01 (not compressed) (should work with WM6.5.3) (9.6 MB)
Terminal v1.01 (WM) (~5.3 Mb compressed with upx)     Terminal v1.01 (~6.13 Mb) (XP,Vista)   

Terminal v1.02 (not compressed) (12MB) (Windows XP, Vista),
Terminal V1.02 (WM6) (Comming Soon!)

In v1.02 is extened baud rate up to 921600bps.

In v1.01 multiple button Send support (M buttons) with preprogrammed values. Support of formats: ASCII, DEC, HEX, BIN. Support of clearing TX and RX windows. Support of repeat of sending data though preprogrammed M buttons.

Test results:

Terminal was tested using HTC Touch Pro2 (Windows Mobile 6.5) and HTC Tytn II (Windows Mobile 6.1)  mobile phones.

As communication environment an integrated Bluetooth device was used in RS232 port mode.

Pictures of Terminal v1.01/v1.02:

The same program compiled for Windows XP:

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This is simple 32 bit NCO that can be included in to NIOS processor. There is nothing special and it has no table to create sine or triangle output signals. Some times it is useful as simple square wave generator with source clock jitter.
VHDL code consist only from one process that implements signal generation:

process( reset_n, clk)
begin
if (reset_n= ’0′) then
NCO_ACCUM<=(others=>’0′);
elsif rising_edge(clk) then
if (address = “000000″ and writas=’0′ and chipselect=’1′)then
NCO_CONTROL_VALUE<=writedata;
end if;
NCO_ACCUM<= NCO_ACCUM + (unsigned(NCO_CONTROL_VALUE));
end if;
NCO_OUT<=NCO_ACCUM(31);
end process;

To set output frequency you can use definition:

#define NCO(data) IOWR(NCO_0_BASE, 0, (unsigned int) (42.95*((float)data)))
Here NCO_0_BASE – is a base address of component in SOPC builder or you can find it in NIOS software project file: system.h.

For example: if you want to set output frequency (Note that source clock is 100 MHz) 4 MHz use command NCO(4000000).
Just copy files to your project directory and add it to NIOS processor using SOPC Builder.

Download: nco

Here is provided Demo version of CT Stroke Finder  (Winodws app.) that is capable to automatically detect Human brain Ischemic Stroke areas, using hybrid methods. These methods are described in my PhD. thesis.

Software usage:

Use DICOM format images aquired from CT scanner, add prefix .dcm. The main requirement is to use CT images with all slices (no missing slice must be) .
Click “Load DICOM” or use menu “File” to open directory with DICOM images. Select any one file and press “Open” button.
There is two buttons “Previous” and “Next”. They let switch between slices. Contrast button helps to achieve better visibility of stroke area (Demo version: Contrast Increase only).
Several check boxes:

Load Preprocessed – this option can be used if you need to load preprocessed images. It removes headrest and other artifacts that surround head image.
Show Processed – this option show processed images.
Show Symmetry – this option show automatically detected symmetry axis.

Software limitations:

• Angled images are artificially rotated by algorithm to perpendicular position. Thus, using angled image result will be shifted by detected angle.
• Each time you need to reopen program again to process new images.
• The first and the last slice is not processed, the results available on these slices are incorrect.
• There is not available regulation of strength of  symmetry axis filter (usually this option increase quality of recognition).

Fig. 1 Screen shot of the  main window

Published on: Dec 29, 2010
Resources:
Main program: CT_Stroke_Finder_1v
DICOM Images: Anon1, Anon2, Anon3, Anon4.

This simple external reset timer is useful to reset NIOS CPU after configuration of FPGA.

1 pav. An example of reset timer for NIOS CPU

Below is shown an example of timer in VHDL wich uses external clock. There can be many ways how to do reset for CPU. Changing generic value of W you can change reset hold time. Moreover there is easy to add additional reset outputs with specific hold times if necessary (subtracting some delay number from compare_value).

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Here is presented simple multi-PWM module that can be integrated into NIOS processor using SOPC builder. You need to copy these files multipwm.zip to your project directory and open SOPC builder.
In main menu list of components should appear multi_pwm component  (Fig.1).

Fig. 1. Multi_pwm component in SOPC Builder environment

Click on Add button and enter size parameter W of required increment accumulator (Fig2.). For example: if you enter 8, then PWM will be generated with 8 bit increment accumulator. Then using 100MHz clock for NIOS processor output frequency will be 100Mhz/256=390625 Hz. Read the rest of this entry »